A look at the ARM architecture

I must say I'm a big fan of the x86 architecture, and Intel processors, especially when writing assembly code.
The instruction set on that type of processors is nice, there's not too much registers... In one word: SISC.

At the opposite, I always felt completely stupid with RISC processors. From the PPC architecture, with all that vectorial and floating point registers, to the ARM architecture, know used on the iOS devices.

I took a closer look on the ARM architecture some time ago, because I always felt the need to know more about RISC processors.

Here are a few tips, or things that I've learned about the ARM architecture.

First of all, an ARM processor can be run in several modes, as Intel processors.
The six available modes are:

  1. User: The unprivileged mode under which most tasks run
  2. FIQ: Entered when a high priority interrupt is raised
  3. IRQ: Entered when a low priority nterrupt is raised
  4. Supervisor: Entered on reset and when a interrupt instruction is run
  5. Abort: Memory access violations
  6. Undef: Undefined instructions mode

I must say I always felt bad with RISC registers. There are just too many of them.
The ARM architecture has 37 registers. All registers are 32 bits long.

The registers are:

  1. 1 program counter
  2. 1 current program status register
  3. 5 saved program status registers
  4. 30 general purpose registers

However, access to these registers are defined by the CPU mode.
Each mode has access to 13 general purpose registers (r0 - r12), a stack pointer (r13), a link regiser (r14), a program counter (r15), and the current program status register (cpsr).

When running supervisor mode, the spsr (saved program status register) register is also available.

The ARM architecture does not support shift operations, but they can be done through multiplication, by a power of 2.

It's also important to note that the ARM architecture is a «load & store» architecture, meaning memory to memory data processing is not available.
Data need to be copied into registers first, and then processed.